1. Field of the Invention
The present invention generally relates to a semiconductor memory device and, more particularly, to a ferroelectric memory device using a ferroelectric member as a capacitive element.
2. Description of the Related Art
In general, a ferroelectric memory device is a memory device using a ferroelectric thin film as a capacitive element. One of such ferroelectric memory devices is designed on the basis of the fact that the dielectric constant of a ferroelectric material is much larger (about fifty to several hundreds times) than that of a dielectric material such as SiO.sub.2 generally used for a semiconductor device. That is, a ferroelectric thin film is used as a shadow capacitor of a conventional dynamic random access memory (DRAM) to achieve a higher integration density than the conventional memory.
In addition, a ferroelectric memory device is used as a nonvolatile memory based on ferroelectric polarization caused in a ferroelectric member. This nonvolatile memory is based on the characteristic of a ferroelectric member that once an external electric field is applied, it retains polarization (ferroelectric polarization) after the external electric field ceases to be applied unless an electric field is applied in the reverse direction.
In addition, since the reversing speed of the polarization of the ferroelectric member is high, it is expected that the speed of writing data in the memory using the ferroelectric member can be increased as compared with an electrically erasable programmable read-only memory (EEPROM) and the like which are widely used nowadays. Therefore, it is expected that ferroelectric memory devices are used as erasable nonvolatile memory devices including magnetic disks and the like.
Furthermore, since data stored in a ferroelectric memory device is not influenced by cosmic rays which externally enter the device, the reliability of the ferroelectric memory device is higher than that of a conventional semiconductor memory.
As such a ferroelectric memory device, a conventional device having the following structure is known. As shown in FIG. 17, ferroelectric capacitors, each constituted by a ferroelectric film and electrodes formed to sandwich the film, are arranged in a matrix so as to form a large number of orthogonal belt-like electrodes X.sub.1, X.sub.2, . . . , X.sub.n, and Y.sub.1, Y.sub.2, . . . , Y.sub.n. In this case, the respective electrodes are capacitively coupled through the ferroelectric films. As a result, memory cells C.sub.11, C.sub.12, . . . , C.sub.nn constituted by the ferroelectric capacitors are formed at the intersections between the respective X and Y electrodes. A memory device having such a structure is called a simple matrix memory device using a ferroelectric material.
However, in the simple matrix memory device, when, for example, a voltage is applied to the memory cell C.sub.11 selected by the electrodes X.sub.1 and Y.sub.1 shown in FIG. 3, the voltage is applied to not only the memory cell C.sub.11 but also the memory cells C.sub.12 and C.sub.21 as non-selected cells.
When, therefore, a voltage is applied to the memory cell C.sub.11 to read out information recorded therein, part of information recorded in the memory cells C.sub.12 and C.sub.21 is also read out. As a result, an error is caused in the information from the memory cell C.sub.11. Similarly, in a writing operation, when information is written in the memory cell C.sub.11, part of the information is also written in the memory cells C.sub.12 and C.sub.21.
Such a phenomenon is called "crosstalk". The amount of crosstalk caused is increased with an increase in the size of a matrix arrangement. Consequently, information to be read or written may be mixed with crosstalk components.
For this reason, a memory arrangement called an active matrix is generally used, in which a three-terminal switch constituted by a MOS transistor or the like and designed for crosstalk protection is formed for each memory cell, as shown in FIG. 18.
In this active matrix arrangement, however, since a switch controlled by an external signal is added to each memory cell, the stacked structure is complicated. In addition, control lines for controlling switching of the memory cells are required, hindering the realization of a high-density structure.